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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST72324BJ2 데이터시트(PDF) 55 Page - STMicroelectronics |
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ST72324BJ2 데이터시트(HTML) 55 Page - STMicroelectronics |
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55 / 188 page  ST72324B I/O ports 55/188 Figure 30. I/O port general block diagram Table 27. I/O port mode options Configuration mode Pull-up P-buffer Diodes to VDD (1) 1. The diode to VDD is not implemented in the true open drain pads. to VSS (2) 2. A local protection between the pad and VSS is implemented to protect the device against positive stress. Input Floating with/without Interrupt Off(3) 3. Off = implemented not activated. Off On On Pull-up with/without Interrupt On(4) 4. On = implemented and activated. Output Push-pull Off On Open drain (logic level) Off True open drain NI NI NI(5) 5. NI = not implemented DR DDR OR Pad VDD Alternate enable Alternate output 1 0 OR SEL DDR SEL DR SEL Pull-up condition P-buffer (see table 24 below) N-buffer Pull-up (see table 24 below) 1 0 Analog input If implemented VDD Diodes (see table 24 below) CMOS Register access External interrupt source (eix) Alternate input Schmitt trigger |
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