ST72324BJ2 datasheet(121/188 Pages) STMICROELECTRONICS

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ST72324B

On-chip peripherals

121/188

SCI Extended Transmit Prescaler Division Register (SCIETPR)

This register is used to set the External Prescaler rate division factor for the transmit circuit.

Table 65.

SCIERPR register description

Bit

Name

Function

7:0

ERPR[7:0]

8-bit Extended Receive Prescaler Register

The extended baud rate generator is activated when a value different from 00h

is stored in this register. Therefore the clock frequency issued from the 16

divider (see Figure 59) is divided by the binary factor set in the SCIERPR

The extended baud rate generator is not used after a reset.

SCIETPR

Reset value: 0000 0000 (00h)

654

ETPR[7:0]

R/W

Table 66.

SCIETPR register description

Bit

Name

Function

7:0

ETPR[7:0]

8-bit Extended Transmit Prescaler Register

The extended baud rate generator is activated when a value different from 00h

is stored in this register. Therefore the clock frequency issued from the 16

divider (see Figure 59) is divided by the binary factor set in the SCIETPR

The extended baud rate generator is not used after a reset.

Table 67.

Baud rate selection

Symbol

Parameter

Conditions

Standard

Baud rate

Unit

fCPU

Accuracy vs.

Standard

Prescaler

fTx

fRx

Communication

frequency

8MHz

~0.16%

Conventional mode

TR (or RR) = 128, PR = 13

TR (or RR) = 32, PR = 13

TR (or RR) = 16, PR = 13

TR (or RR) = 8, PR = 13

TR (or RR) = 4, PR = 13

TR (or RR) = 16, PR = 3

TR (or RR) = 2, PR =13

TR (or RR) = 1, PR = 13

300

1200

2400

4800

9600

10400

19200

38400

~300.48

~1201.92

~2403.84

~4807.69

~9615.38

~10416.67

~19230.77

~38461.54

~0.79%

Extended mode

ETPR (or ERPR) = 35,

TR (or RR)= 1, PR = 1

14400

~14285.71

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