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AFE4490 데이터시트(PDF) 20 Page - Texas Instruments |
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AFE4490 데이터시트(HTML) 20 Page - Texas Instruments |
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20 / 85 page ![]() I2C_DAT I2C_CLK START Condition (S) STOP Condition (P) I2C_DAT I2C_CLK Data Line Stable Data Data Line Transition Allowed 20 AFE4404 SBAS689D – JUNE 2015 – REVISED DECEMBER 2016 www.ti.com Product Folder Links: AFE4404 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 8.3.5 I2C Interface The AFE has an I2C interface for communication. The I2C_CLK and I2C_DAT lines require external pullup resistors to IO_SUP. See the I2C protocol standards documents for details of the I2C interface. This section only describes certain key features of the interface. The data on I2C_DAT must be stable during the high level of I2C_CLK and may transition during the low level of I2C_CLK, as shown in Figure 28. Figure 28. Allowed Transition of I2C_DAT while Transmission of Data Bits The start condition is indicated by a high-to-low transition of the I2C_DAT line when the I2C_CLK is high. A stop condition is indicated by a low-to-high transition of the I2C_DAT line when the I2C_CLK is high. Figure 29 shows the start and stop conditions. Figure 29. Transition of I2C_DAT during Start and Stop Conditions |
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