IMX93CEC datasheet(32/123 Pages) NXP

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4.6.3 LVDS AC Parameters

The differential output transition time waveform is shown in Figure 7.

Voh

Padp

Channel A Vod = Pad P - Pad N

Vol

80%

20%

0 V

0 V (differential)

Padn

80%

20%

tTHL

0 V

0 V (differential)

tskew

Channel B Vod = Pad P - Pad N

VOSPP

Channel A output common mode voltage (Vcm)

tTLH

Figure 7. Output transition time waveform

Table 29 shows the AC parameters of LVDS.

Table 29. LVDS AC parameters

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Lane skew[1]

tSKew

Rload = 100 Ω

Cload = 2 pF

—

0.25[2]

—

Transition Low to High time[3]

tTLH

—

0.3

Unit

Interval

(UI)[4]

Transition High to Low time

tTHL

—

0.3

Operating data rate[5]

—

560

Mbps

Offset peak to peak voltage imbalance

Vospp

—

150

Tri-state I/O supply current

Icc-ovdd

VIN=OVDD or 0

0.016

—

1700

Tri-state core supply current

Icc-vddi

VIN=VDDI or 0

—

1500

Power Supply current

Icc

VIN=OVDD or 0

Rload=100 Ω

—

[1] tSKew is the differential time at Vod = 0 voltage between different channel.

[2] This is typical maximum absolute delay between any two channels.

[3] Measurement levels are 20–80% from output voltage.

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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