ST20-GP1 datasheet(65/116 Pages) STMICROELECTRONICS

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ST20-GP1

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SysRatio

The SysRatio register is a read only register and gives the speed at which the system PLL is running.

It contains the relevant PLL multiply ratio when using the PLL, or contains the value ‘1’ when in

TimesOneMode for the PLL.

Table 10.9 SysRatio register format

WdEnable

Setting the WdEnable register enables the low power alarm counter to be used as a watchdog

timer.

Table 10.10 WdEnable register format

WdFlag

This register can be used to determine if the device was reset by the notRST input or by a

watchdog time-out.

Note that this bit is not reset by the CPUReset input.

Table 10.11 WdFlag register format

10.4 Clocking sources

The low power timer and alarm must be clocked at all times by one of the following clocking sources:

•

External clock input (LPClockIn) — this clock must not be more than one eighth of the sys-

tem clock rate. In this case the LPClockOsc pin should not be connected on the board.

•

Watch crystal, as in Figure 10.1.

SysRatio

LPC base address + #500

Read

Bit

Bit ﬁeld

Function

5:0

SysRatio

PLL speed, as follows:

SysRatio PLL

TimesOneMode

16.368 MHz

32.736 MHz

RESERVED

WdEnable

LPC base address + #510

Read/Write

Bit

Bit ﬁeld

Function

WdEnable

Determines whether the low power alarm is set to operate as an alarm or as a

watchdog timer.

alarm

watchdog

WdFlag

LPC base address + #514

Read

Bit

Bit ﬁeld

Function

WdFlag

Watchdog timer ﬂag.

set to 0 by an external notRST

set to 1 when the watchdog counter is #1 and the WdEnable register is 1

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