ST20-GP1 datasheet(98/116 Pages) STMICROELECTRONICS

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ST20-GP1

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DC speciﬁcations

Notes

This is the static speciﬁcation to ensure low current.

Output current of 2mA.

Output current of -2mA.

Excludes power used to drive external loads. Includes operation of the 32 KHz watch crys-

tal oscillator.

Device operation suspended by use of the low power controller with VDD and RTCVDD

within speciﬁcation. Frequency of system clock (fclk) is 16.368 MHz and frequency of low

power clock is 32768 Hz.

With RTCVDD within speciﬁcation and VDD at 0 V. All inputs static except LowPower-

ClockIn and LowPowerClockOsc, frequency of low power clock 32768 Hz. All other

inputs must be in the range -0.1 to 0.1 V.

Symbol Parameter

Min

Typical Max

Units Notes

VDD

Positive supply voltage during normal operation.

3.0

3.3

3.6

VDDoff

Positive supply voltage when device is off but real time

clock is running.

-0.3

0.3

VDDrtc

Voltage at RTCVDD pin referred to GND.

3.0

3.3

3.6

VDDdiff

VDD-VDDrtc during normal operation and notRST set to

-0.3

0.3

Vih

Input logic 1 for LPClockIn, notRST and test control pins.

Input logic 1 for all other inputs.

PIO pins.

2.0

2.4

VDDrtc + 0.5

VDD + 0.5

Vil

Input logic 0 for all inputs.

-0.5

0.8

Iin

Input current to input pins.

-10

µA

Ioz

Off state digital output current.

-50

µA

Vohdc

Output logic 1

2.4

VDD

Voldc

Output logic 0

0.4

Cin

Input capacitance (input only pins).

Cout

Output capacitance and capacitance of bidirectional pins.

Pop

Operational power consumption under heavy device

activity. fclk of 16.368 MHz and SpeedSelect set to PLL

operation (x1). No external memory used.

0.5

0.8

Papp

Operational power consumption under ‘typical’ device

activity. fclk of 16.368 MHz and SpeedSelect set to PLL

operation (x2). External memory used.

0.75

1.1

Pstby

Operational power during stand-by.

0.16

0.3

Prtc

Operational power for the real time clock only, supplied

through the RTCVDD pin.

1mW

Table 17.3 DC speciﬁcation

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