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ST20-GP1 데이터시트(PDF) 58 Page - STMicroelectronics

부품명 ST20-GP1
상세설명  GPS PROCESSOR
PDF  116 Pages
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ST20-GP1 데이터시트(HTML) 58 Page - STMicroelectronics

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9.5
EMI configuration registers
Configuration parameters are stored in registers which are mapped into the device address space.
They may be accessed using
devsw (device store word) and devlw (device load word) instructions.
The base addresses for the EMI registers are given in the Memory Map chapter.
EMIConfigData0-3 registers
The EMIConfigData0-3 registers contain configuration data for each of the EMI banks. The format
of each of the EMIConfigData0-3 registers is identical and is shown in Table 9.4.
EMIConfigLock register
The EMIConfigLock register is provided to write protect the EMIConfigData0-3 registers (further
writes to these registers are ignored). This bit is set by performing a
devsw instruction to the given
address; the write data is ignored.
This register, once set, can only be cleared by resetting the ST20-GP1.
EMIConfigStatus register
The EMIConfigStatus register is provided to indicate which registers have been written to and the
EMIConfigData0-3
EMI base address + #00, #04, #08, #0C
Read/Write
Bit
Bit field
Function
Units
0
MemWaitEnable
Enables the MemWait pin.
-
3:1
DataDriveDelay
Drive delay of data bus for writes.
Phases
4
BusWidth
Bus width of the bank (8 or 16 bits).
BusWidth
Bank width
0
16 bits
1
8 bits
-
8:5
AccessDuration
Duration of the external access.
Cycles
10:9
BusReleaseTime
Duration bus release time.
Cycles
14:11
CEe1Time
Delay from access start to notMemCE falling edge.
Phases
18:15
CEe2Time
Delay from notMemCE rising edge to end of access.
Phases
22:19
OEe1Time
Delay from access start to notMemOE falling edge.
Phases
26:23
WBe1Time
Delay from access start to notMemWB falling edge.
Phases
30:27
WBe2Time
Delay from notMemWB rising edge to end of access.
Phases
31
Reserved
-
Table 9.4 EMIConfigData0-3 register format - 1 per bank
EMIConfigLock
EMI base address + #10
Write only
Bit
Bit field
Function
0
ConfigLock
When set, the EMIConfigData0-3 registers are read only.
Table 9.5 EMIConfigLock register format



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