ST20-GP1 datasheet(79/116 Pages) STMICROELECTRONICS

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ST20-GP1

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13.4.1 Using the ASC interrupts

For normal operation (i.e. besides the error interrupt) the ASC provides three interrupt requests to

control data exchange via the serial channel:

•

TxBufEmpty is activated when data is moved from ASCTxBuffer to the transmit shift reg-

ister.

•

TxEmpty is activated before the last bit of a frame is transmitted.

•

RxBufFull is activated when the received frame is moved to ASCRxBuffer.

The transmitter generates two interrupts. This provides advantages for the servicing software.

For single transfers it is sufficient to use the transmitter interrupt (TxEmpty), which indicates that

the previously loaded data has been transmitted, except for the last bit of a frame.

For multiple back-to-back transfers it is necessary to load the next data before the last bit of the

previous frame has been transmitted. This leaves just one bit-time for the handler to respond to the

transmitter interrupt request.

Using the transmit buffer interrupt (TxBufEmpty) to reload transmit data allows the time to transmit

a complete frame for the service routine, as ASCTxBuffer may be reloaded while the previous

data is still being transmitted.

As shown in Figure 13.5 below, TxBufEmpty is an early trigger for the reload routine, while

TxEmpty indicates the completed transmission of the data field of the frame. Therefore, software

using handshake should rely on TxEmpty at the end of a data block to make sure that all data has

really been transmitted.

Figure 13.5 ASC interrupt generation

13.5 ASC conﬁguration registers

ASCBaudRate register

The ASCBaudRate register is the dual-function baud rate generator/reload register.

A read from this register returns the content of the timer, writing to it updates the reload register.

An auto-reload of the timer with the content of the reload register is performed each time the

ASCBaudRate register is written to. However, if the Run bit of the ASCControl register, see Table

13.5, is 0 at the time the write operation to the ASCBaudRate register is performed, the timer will

not be reloaded until the first CPU clock cycle after the Run bit is 1.

Idle

TxBufEmpty

TxEmpty

TxBufEmpty

TxEmpty

RxBufFull

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