| 전자부품 데이터시트 검색엔진 |
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ECP2 데이터시트(PDF) 108 Page - Lattice Semiconductor |
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ECP2 데이터시트(HTML) 108 Page - Lattice Semiconductor |
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108 / 386 page ![]() 4-7 Pinout Information Lattice Semiconductor LatticeECP2/M Family Data Sheet LatticeECP2 Pin Information Summary, LFE2-20 and LFE2-35 Pin Type LFE2-20 LFE2-35 208 PQFP 256 fpBGA 484 fpBGA 672 fpBGA 484 fpBGA 672 fpBGA Single Ended User I/O 131 193 331 402 331 450 Differential Pair User I/O 62 96 165 200 165 224 Configuration TAP Pins 555555 Muxed Pins 14 14 14 14 14 14 Dedicated Pins (Non TAP) 777777 Non Configuration Muxed Pins 42 54 60 64 60 68 Dedicated Pins 333333 VCC 14 7 18241622 VCCAUX 8 4 16 16 16 16 VCCPLL 000022 VCCIO Bank0 224545 Bank1 224545 Bank2 224545 Bank3 224545 Bank4 224545 Bank5 224545 Bank6 224545 Bank7 224545 Bank8 212222 GND, GND0 to GND7 22 20 60 72 60 72 NC 0 1 8 101 8 102 Single Ended/ Differential I/O Pairs per Bank (including emulated with resistors) Bank0 18/9 18/9 50/25 67/33 50/25 67/33 Bank1 18/9 34/17 46/23 52/26 46/23 52/26 Bank2 11/5 20/10 34/17 36/18 34/17 48/24 Bank3 11/5 12/6 22/11 32/16 22/11 42/21 Bank4 19/9 32/16 46/23 50/25 46/23 54/27 Bank5 18/9 17/8 46/23 68/34 46/23 68/34 Bank6 18/8 26/13 40/20 48/24 40/20 58/29 Bank7 12/6 20/10 33/16 35/17 33/16 47/23 Bank8 6/2 14/7 14/7 14/7 14/7 14/7 True LVDS I/O Pairs per Bank Bank0 (Top Edge) 000000 Bank1 (Top Edge) 000000 Bank2 (Right Edge) 45999 12 Bank3 (Right Edge) 335859 Bank4 (Bottom Edge) 000000 Bank5 (Bottom Edge) 000000 Bank6 (Left Edge) 6 7 10 12 10 13 Bank7 (Left Edge) 55888 11 Bank8 (Right Edge) 000000 |
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