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LFSC 데이터시트(PDF) 43 Page - Lattice Semiconductor

부품명 LFSC
상세설명  LatticeSC/M Family Data Sheet
PDF  237 Pages
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제조업체  LATTICE [Lattice Semiconductor]
홈페이지  http://www.latticesemi.com
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LFSC 데이터시트(HTML) 43 Page - Lattice Semiconductor

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2-39
Architecture
Lattice Semiconductor
LatticeSC/M Family Data Sheet
Internal Logic Analyzer Capability (ispTRACY)
All LatticeSC devices support an internal logic analyzer diagnostic feature. The diagnostic features provide capabil-
ities similar to an external logic analyzer, such as programmable event and trigger condition and deep trace mem-
ory. This feature is enabled by Lattice’s ispTRACY. The ispTRACY utility is added into the user design at compile
time. For additional detail refer to technical information at the end of the data sheet.
Temperature Sensing
Lattice provides a way to monitor the die temperature by using a temperature-sensing diode that is designed into
every LatticeSC device. The difference in VBE of the diode at two different forward currents varies with temperature.
This relationship is shown in Figure 2-33. The accuracy of the temperature-sensing diode is typically +/- 10°C.
On packages that include PROBE_GND, the most accurate measurements will occur between the TEMP pin and
the PROBE_GND pin. On packages that do not include PROBE_GND, measurements should be made between
the TEMP pin and board ground.
This temperature-sensing diode is designed to work with an external temperature sensor such as the Maxim
1617A. The Maxim 1617A is configured to measure difference in VBE (of the temperature-sensing diode) at 10µA
and at 100µA. This difference in VBE voltage varies with temperature at approximately 1.64 mV/°C. A typical device
with a 85°C junction temperature will measure approximately 593mV. For additional detail refer to the temperature-
sensing diode technical note, TN1115.
Figure 2-33. Sensing Diode Typical Characteristics
Oscillator
Every LatticeSC device has an internal CMOS oscillator, which is used as a master serial clock for configuration
and is also available as a potential general purpose clock (MCK) for the FPGA core. There is a K divider (divide by
2/4/8/16/32/64/128) available with this oscillator to get lower MCK frequencies. This clock is available as a general
purpose clock signal to the software routing tool. For additional detail refer to technical information at the end of the
data sheet.
0.50
-50
50
75
100
125
-25
25
100μA
10μA
Junction Temperature (°C)
0
0.55
0.65
0.65
0.70
0.75
0.80
0.88
VBE difference
increases with
temperature



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