| 전자부품 데이터시트 검색엔진 |
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H838532H 데이터시트(PDF) 147 Page - Renesas Technology Corp |
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H838532H 데이터시트(HTML) 147 Page - Renesas Technology Corp |
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147 / 508 page ![]() Section 6 ROM Rev. 1.00 May 30, 2008 Page 127 of 484 REJ09B0436-0100 Bit 5—Erase Setup (ESU) This bit is to prepare for changing to erase mode. Set this bit to 1 before setting the E bit to 1 in FLMCR1 (do not set SWE, PSU, EV, PV, E, and P bits at the same time). Bit 5 ESU Description 0 The erase setup state is cancelled (initial value) 1 The flash memory changes to the erase setup state. Set this bit to 1 before setting the E bit to 1 in FLMCR1. Bit 4—Program Setup (PSU) This bit is to prepare for changing to program mode. Set this bit to 1 before setting the P bit to 1 in FLMCR1 (do not set SWE, ESU, EV, PV, E, and P bits at the same time). Bit 4 PSU Description 0 The program setup state is cancelled (initial value) 1 The flash memory changes to the program setup state. Set this bit to 1 before setting the P bit to 1 in FLMCR1. Bit 3—Erase-Verify (EV) This bit is to set changing to or cancelling erase-verify mode (do not set SWE, ESU, PSU, PV, E, and P bits at the same time). Bit 3 EV Description 0 Erase-verify mode is cancelled (initial value) 1 The flash memory changes to erase-verify mode |
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