SC9RS08KA2 datasheet(118/134 Pages) FREESCALE

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Appendix A Electrical Characteristics

SC9RS08KA2 Series Data Sheet, Rev. 1

118

Freescale Semiconductor

A.9

AC Characteristics

This section describes ac timing characteristics for each peripheral system.

A.9.1

Control Timing

Figure A-1. Reset Timing

Stop recovery time (FLL wakeup to previous acquired

frequency)

IREFSTEN=0

IREFSTEN=1

t_wakeup

tir_wu

tfll_wu

—100

—

μs

1 Data in typical column was characterized at 3.0 V and 5.0 V, 25

°C or is typical recommended value.

2 This parameter is characterized and not tested on each device.

3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing

from FLL disabled (FBILP) to FLL enabled (FEI, FBI).

Table A-8. Control Timing

Parameter

Symbol

Min

Typical

Max

Unit

Bus frequency (tcyc = 1/fBus)fBus

—

MHz

Real time interrupt internal oscillator period

tRTI

700

1000

1300

μs

External RESET pulse width1

1 This is the shortest pulse that is guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be

recognized.

textrst

150

—

KBI pulse width2

2 This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or

may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.

tKBIPW

1.5 tcyc

——

KBI pulse width in stop1

tKBIPWS

100

—

Port rise and fall time (load = 50 pF)3

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

3 Timing is shown with respect to 20% V

DD and 80% VDD levels. Temperature range –40°C to 85°C.

tRise, tFall

—

Table A-7. Internal Clock Source Specifications

Characteristic

Symbol

Min

Typ1

Max

Unit

textrst

RESET

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