AT90SCR100 datasheet(147/433 Pages) ATMEL

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147

TPR0327AY–SMS–30Jan09

AT90SCR100

Table 13-21 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM

mode.

Note:

1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-

pare Match is ignored, but the set or clear is done at BOTTOM. See “Fast PWM Mode” on

page 140 for more details.

Table 13-22 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-

rect PWM mode.

Note:

1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-

pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on

page 142 for more details.

• Bits 3..2 – Res: Reserved Bits

These bits are reserved bits in the AT90SCR100 and will always read as zero.

• Bits 1..0 – WGM21..0: Waveform Generation Mode

Table 13-20.

Compare Output Mode, non-PWM Mode

COM2B1

COM2B0

Description

Normal port operation, OC2B disconnected.

Toggle OC2B on Compare Match

Clear OC2B on Compare Match

Set OC2B on Compare Match

Table 13-21.

Compare Output Mode, Fast PWM Mode(1)

COM2B1

COM2B0

Description

Normal port operation, OC2B disconnected.

Reserved

Clear OC2B on Compare Match, set OC2B at BOTTOM

(non-inverting mode)

Set OC2B on Compare Match, clear OC2B at BOTTOM

(inverting mode)

Table 13-22.

Compare Output Mode, Phase Correct PWM Mode(1)

COM2B1

COM2B0

Description

Normal port operation, OC2B disconnected.

Reserved

Clear OC2B on Compare Match when up-counting. Set OC2B on

Compare Match when down-counting.

Set OC2B on Compare Match when up-counting. Clear OC2B on

Compare Match when down-counting.

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