AT90SCR100 datasheet(261/433 Pages) ATMEL

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261

TPR0327AY–SMS–30Jan09

AT90SCR100

the receiver is optional and is done by setting the RXEN0 bit in the UCSR0B register to one.

When the receiver is enabled, the normal pin operation of the RxD0 pin is overridden and given

the function as the Receiver's serial input. The XCK0 will in both cases be used as the transfer

clock.

After initialization the USART is ready for doing data transfers. A data transfer is initiated by writ-

ing to the UDR0 I/O location. This is the case for both sending and receiving data since the

transmitter controls the transfer clock. The data written to UDR0 is moved from the transmit buf-

fer to the shift register when the shift register is ready to send a new frame.

The following code examples show a simple USART in MSPIM mode transfer function based on

polling of the Data Register Empty (UDRE0) Flag and the Receive Complete (RXC0) Flag. The

USART has to be initialized before the function can be used. For the assembly code, the data to

be sent is assumed to be stored in Register R16 and the data received will be available in the

same register (R16) after the function returns.

The function simply waits for the transmit buffer to be empty by checking the UDRE0 Flag,

before loading it with new data to be transmitted. The function then waits for data to be present

in the receive buffer by checking the RXC0 Flag, before reading the buffer and returning the

value..

To keep the input buffer in sync with the number of data bytes transmitted, the

UDR0 register must be read once for each byte transmitted. The input buffer oper-

ation is identical to normal USART mode, i.e. if an overflow occurs the character

last received will be lost, not the first data in the buffer. This means that if four

bytes are transferred, byte 1 first, then byte 2, 3, and 4, and the UDR0 is not read

before all transfers are completed, then byte 3 to be received will be lost, and not

byte 1.

Note

AT90SCR100 데이터시트(PDF) 261 Page - ATMEL Corporation