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LPC1547JBD48 데이터시트(PDF) 76 Page - NXP Semiconductors |
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LPC1547JBD48 데이터시트(HTML) 76 Page - NXP Semiconductors |
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76 / 99 page ![]() LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 1 — 19 February 2014 76 of 99 NXP Semiconductors LPC15xx 32-bit ARM Cortex-M3 microcontroller 12.8 SCT output timing 13. Characteristics of analog peripherals [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see the LPC15xx user manual. Table 22. SCT output dynamic characteristics Tamb = 40 C to 105 C; 2.4 V <= VDD <= 3.6 V Cl = 10 pF. Simulated skew (over process, voltage, and temperature) of any two SCT fixed-pin output signals; sampled at the 50 % level of the falling or rising edge; values guaranteed by design. Symbol Parameter Conditions Min Typ Max Unit tsk(o) output skew time SCTimer0/PWM - - 4 ns SCTimer1/PWM - - 3 ns SCTimer2/PWM - - 1 ns SCTimer3/PWM - - 2 ns Table 23. BOD static characteristics[1] Tamb =25 C. Symbol Parameter Conditions Min Typ Max Unit Vth threshold voltage interrupt level 2 assertion - 2.55 - V de-assertion - 2.69 - V interrupt level 3 assertion - 2.83 - V de-assertion - 2.96 - V reset level 2 assertion - 2.34 - V de-assertion - 2.49 - V reset level 3 assertion - 2.64 - V de-assertion - 2.79 - V |
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