| 전자부품 데이터시트 검색엔진 |
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PC87591L 데이터시트(PDF) 361 Page - National Semiconductor (TI) |
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PC87591L 데이터시트(HTML) 361 Page - National Semiconductor (TI) |
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361 / 437 page ![]() Host-Controlled Modules and Host Interface (Continued) Revision 1.07 361 www.national.com Figure 119 shows typical battery current consumption during battery-backed operation; Figure 120 shows typical battery current consumption during normal operation. Figure 119. Typical Battery Current During Battery-Backed Power Mode Figure 120. Typical Battery Current During Normal Operation Mode 6.2.10 System Bus Lockout During power on or power off, spurious bus transactions from the host may occur. To protect the RTC internal registers from corruption, all inputs are automatically locked out. The lockout condition is asserted when VCC is lower than VCCON. 6.2.11 Power-Up Detection When system power is restored after a power failure or power off state (VCC=0), the lockout condition continues for a delay of 62 ms (minimum) to 125 ms (maximum) after the RTC switches from battery to system power. The lockout condition is switched off immediately in the following situations: ● If the Divider Chain Control bits, DV0-2, (bits 6-4 in CRA register) specify a normal operation mode (0102), all input signals are enabled immediately on detection of system voltage above VCCON. ● When battery voltage is below VBATDCT and host domain hardware reset is active, all input signals are enabled im- mediately on detection of system voltage above VCCON. This also initializes registers at offsets 0016 through 0D16. ● If bit 7 (VRT) of CRD register is 0, all input signals are enabled immediately on detection of system voltage above VCCON. time VCC VPP VBAT 3.3V - 3.6V VCC2PP VPP2CC VPP uses VCC VPP uses VBAT Figure 118. VPP Generation Using VCC or VBAT VPP VBAT VCC VPP uses VBAT IBAT (µA) 1.0 0.9 0.8 0.7 2.4 3.0 3.6 VBAT (V) IBAT (µA) 0.20 0.15 0.10 0.05 3.0 3.3 3.6 VCC Note: Battery voltage in this test is 3.0V. (V) |
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