LAN9250 datasheet(21/421 Pages) MICROCHIP

21 / 421 page

 2015 Microchip Technology Inc.

DS00001913A-page 21

LAN9250

Note 4:

Although this pin is an output for SPI instructions, it includes a pull-up since it is also SIO bit 1.

TABLE 3-5:

SPI/SQI PIN DESCRIPTIONS

Num

Pins

Name

Symbol

Buffer

Type

Description

SPI/SQI Slave

Chip Select

SCS#

VIS

(PU)

This pin is the SPI/SQI slave chip select input.

When low, the SPI/SQI slave is selected for SPI/SQI

transfers. When high, the SPI/SQI serial data out-

put(s) is(are) 3-stated.

SPI/SQI Slave

Serial Clock

SCK

VIS

(PU)

This pin is the SPI/SQI slave serial clock input.

SPI/SQI Slave

Serial Data

Input/Output

SIO[3:0]

VIS/VO8

(PU)

These pins are the SPI/SQI slave data input and

output for multiple bit I/O.

SPI Slave Serial

Data Input

VIS

(PU)

This pin is the SPI slave serial data input. SI is

shared with the SIO0 pin.

SPI Slave Serial

Data Output

VO8

(PU)

Note 4

This pin is the SPI slave serial data output. SO is

shared with the SIO1 pin.

TABLE 3-6:

EEPROM PIN DESCRIPTIONS

Num

Pins

Name

Symbol

Buffer

Type

Description

EEPROM I2C

Serial Data

Input/Output

EESDA

VIS/VOD8

When the device is accessing an external EEPROM

this pin is the I2C serial data input/open-drain out-

put.

Note:

This pin must be pulled-up by an exter-

nal resistor at all times.

EEPROM I2C

Serial Clock

EESCL

VIS/VOD8

When the device is accessing an external EEPROM

this pin is the I2C clock input/open-drain output.

Note:

This pin must be pulled-up by an exter-

nal resistor at all times.

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