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LAN9250 데이터시트(PDF) 46 Page - Microchip Technology

부품명 LAN9250
상세설명  Integrated Ethernet PHY with HP Auto-MDIX
PDF  421 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9250 데이터시트(HTML) 46 Page - Microchip Technology

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LAN9250
DS00001913A-page 46
 2015 Microchip Technology Inc.
6.3.3
BLOCK LEVEL POWER MANAGEMENT
The device supports software controlled clock disabling of various modules in order to reduce power consumption.
6.3.3.1
Disabling The Host MAC
The entire Host MAC may be disabled by setting the HMAC_DIS bit in the Power Management Control Register
(PMT_CTRL). As a safety precaution, in order for this bit to be set, it must be written as a 1 two consecutive times. A
write of a 0 will reset the count.
FIGURE 6-1:
PME PIN AND PME INTERRUPT SIGNAL GENERATION
Note:
Disabling individual blocks does not automatically reset the block, it only places it into a static non-opera-
tional state in order to reduce the power consumption of the device. If a block reset is not performed before
re-enabling the block, then care must be taken to ensure that the block is in a state where it can be disabled
and then re-enabled.
PME
ED_EN (bit 14) of
PMT_CTRL register
WOL_EN (bit 9) of
PMT_CTRL register
50ms
PME_EN (bit 1) of
PMT_CTRL register
PME_IND (bit 3) of
PMT_CTRL register
PME_POL (bit 2) of
PMT_CTRL register
PME_TYPE (bit 6) of
PMT_CTRL register
LOGIC
WUEN (bit 2) of
HMAC_WUCSR register
MPEN (bit 1) of
HMAC_WUCSR register
WOL_STS (bit 5) of
PMT_CTRL register
WUFR (bit 6) of
HMAC_WUCSR register
MPR (bit 5) of
HMAC_WUCSR register
Denotes a level-triggered "sticky" status bit
PME_INT_EN (bit 17)
of INT_EN register
PME_INT (bit 17)
of INT_STS register
IRQ_EN (bit 8)
of IRQ_CFG register
IRQ
Other System
Interrupts
ED_STS (bit 16) of
PMT_CTRL register
INT7_MASK (bit 7) of
PHY_INTERRUPT_MASK register
INT7 (bit 7) of
PHY_INTERRUPT_SOURCE register
Polarity &
Buffer Type
Logic
BCST_EN (bit 0) of
HMAC_WUCSR register
BCAST_FR (bit 4) of
HMAC_WUCSR register
PFDA_EN (bit 3) of
HMAC_WUCSR register
PFDA_FR (bit 7) of
HMAC_WUCSR register
Other PHY Interrupts
PM_WAKE (bit 28) of
PMT_CTRL register
PME wake-up



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