LAN9250 datasheet(56/421 Pages) MICROCHIP

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LAN9250

DS00001913A-page 56

 2015 Microchip Technology Inc.

auto_mdix_strap_1

PHY Auto-MDIX Enable Strap:

Configures the default value

of the AMDIX_EN Strap State bit of the Hardware Configura-

tion Register (HW_CFG).

This strap is also used in conjunction with manual_mdix-

_strap_1 to configure PHY Auto-MDIX functionality when the

Auto-MDIX Control (AMDIXCTRL) bit in the PHY Special Con-

trol/Status Indication Register (PHY_SPECIAL_CON-

TROL_STAT_IND) indicates the strap settings should be used

for auto-MDIX configuration.

Note:

This has no effect when the PHY is in 100BASE-FX

mode.

Refer to the respective register definition sections for addi-

tional information.

manual_mdix_strap_1

PHY Manual MDIX Strap:

Configures MDI(0) or MDIX(1) for

the PHY when the auto_mdix_strap_1 is low and the Auto-

MDIX Control (AMDIXCTRL) bit in the PHY Special Control/

Status Indication Register (PHY_SPECIAL_CON-

TROL_STAT_IND) indicates the strap settings are to be used

for auto-MDIX configuration.

Note:

This has no effect when the PHY is in 100BASE-FX

mode.

Refer to the respective register definition sections for addi-

tional information.

autoneg_strap_1

PHY Auto Negotiation Enable Strap:

Configures the default

value of the Auto-Negotiation Enable (PHY_AN) enable bit in

the PHY Basic Control Register (PHY_BASIC_CONTROL).

This strap also affects the default value of the following regis-

ter bits:

• Speed Select LSB (PHY_SPEED_SEL_LSB) and Duplex

Mode (PHY_DUPLEX) bits of the PHY Basic Control

• 10BASE-T Full Duplex and 10BASE-T Half Duplex bits of

the PHY Auto-Negotiation Advertisement Register

(PHY_AN_ADV)

• PHY Mode (MODE[2:0]) bits of the PHY Special Modes

Note:

This has no effect when the PHY is in 100BASE-FX

mode.

Refer to the respective register definition sections for addi-

tional information.

TABLE 7-1:

SOFT-STRAP CONFIGURATION STRAP DEFINITIONS (CONTINUED)

Strap Name

Description

Pin / Default Value

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