LAN9250 datasheet(22/421 Pages) MICROCHIP

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LAN9250

DS00001913A-page 22

 2015 Microchip Technology Inc.

TABLE 3-7:

GPIO, LED & CONFIGURATION STRAP PIN DESCRIPTIONS

Num

Pins

Name

Symbol

Buffer

Type

Description

LED 2

LED2

VO12/

VOD12/

VOS12

This pin is configured to operate as an LED when

the LED 2 Enable bit of the LED Configuration Reg-

ister (LED_CFG) is set. The buffer type depends on

the setting of the LED Function 2-0 (LED_FUN[2:0])

field in the LED Configuration Register (LED_CFG)

and is configured to be either a push-pull or open-

drain/open-source output. When selected as an

open-drain/open-source output, the polarity of this

pin depends upon the E2PSIZE strap value sam-

pled at reset.

Note:

Refer to Section 16.3, "LED Operation,"

on page 385 to additional information.

General

Purpose I/O 2

GPIO2

VIS/VO12/

VOD12

(PU)

This pin is configured to operate as a GPIO when

the LED 2 Enable bit of the LED Configuration Reg-

ister (LED_CFG) is clear. The pin is fully program-

mable as either a push-pull output, an open-drain

output or a Schmitt-triggered input by writing the

General Purpose I/O Configuration Register (GPI-

O_CFG) and the General Purpose I/O Data & Direc-

tion Register (GPIO_DATA_DIR).

EEPROM Size

Configuration

Strap

E2PSIZE

VIS

(PU)

This strap configures the value of the EEPROM

size hard-strap. See Note 5.

A low selects 1K bits (128 x 8) through 16K bits (2K

x 8).

A high selects 32K bits (4K x 8) through 512K bits

(64K x 8).

LED 1

LED1

VO12/

VOD12/

VOS12

This pin is configured to operate as an LED when

the LED 1 Enable bit of the LED Configuration Reg-

ister (LED_CFG) is set. The buffer type depends on

the setting of the LED Function 2-0 (LED_FUN[2:0])

field in the LED Configuration Register (LED_CFG)

and is configured to be either a push-pull or open-

drain/open-source output. When selected as an

open-drain/open-source output, the polarity of this

pin depends upon the MNGT1 strap value sampled

at reset.

Note:

Refer to Section 16.3, "LED Operation,"

on page 385 to additional information.

General

Purpose I/O 1

GPIO1

VIS/VO12/

VOD12

(PU)

This pin is configured to operate as a GPIO when

the LED 1 Enable bit of the LED Configuration Reg-

ister (LED_CFG) is clear. The pin is fully program-

mable as either a push-pull output, an open-drain

output or a Schmitt-triggered input by writing the

General Purpose I/O Configuration Register (GPI-

O_CFG) and the General Purpose I/O Data & Direc-

tion Register (GPIO_DATA_DIR).

Host Interface

Configuration

Strap 1

MNGT1

VIS

(PU)

This strap, along with MNGT0, MNGT2, and

MNGT3 configures the host interface mode. See

Note 5.

See Table 7-3, “HBI Strap Mapping,” on page 61 for

the host interface strap settings.

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