| 전자부품 데이터시트 검색엔진 |
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ST72325AR7-Auto 데이터시트(PDF) 116 Page - STMicroelectronics |
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ST72325AR7-Auto 데이터시트(HTML) 116 Page - STMicroelectronics |
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116 / 243 page ![]() Obsolete Product(s) - Obsolete Product(s) 16-bit timer ST72325xxx-Auto 116/243 Doc ID 13770 Rev 3 13.4 Low power modes 13.5 Interrupts Note: The 16-bit timer interrupt events are connected to the same interrupt vector (see Section 7: Interrupts). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt mask in the CC register is reset (RIM instruction). 13.6 Summary of timer modes Table 57. Effect of low power modes on 16-bit timer Mode Effect Wait No effect on 16-bit timer. Timer interrupts cause the device to exit from Wait mode. Halt 16-bit timer registers are frozen. In Halt mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous count when the MCU is woken up by an interrupt with “exit from Halt mode” capability or from the counter reset value when the MCU is woken up by a RESET. If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is armed. Consequently, when the MCU is woken up by an interrupt with “exit from Halt mode” capability, the ICFi bit is set, and the counter value present when exiting from Halt mode is captured into the ICiR register. Table 58. 16-bit timer interrupt control/wake-up capability Interrupt event Event flag Enable control bit Exit from Wait Exit from Halt Input Capture 1 event/Counter reset in PWM mode ICF1 ICIE Yes No Input Capture 2 event ICF2 Output Compare 1 event (not available in PWM mode) OCF1 OCIE Output Compare 2 event (not available in PWM mode) OCF2 Timer Overflow event TOF TOIE Table 59. Timer modes Modes Timer resources Input Capture 1 Input Capture 2 Output Compare 1 Output Compare 2 Input Capture (1 and/or 2) Yes Yes Yes Yes Output Compare (1 and/or 2) |
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