ST72325AR7-Auto datasheet(177/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

10-bit A/D converter (ADC)

Doc ID 13770 Rev 3

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17.3

Functional description

The conversion is monotonic, meaning that the result never decreases if the analog input

does not and never increases if the analog input does not.

If the input voltage (VAIN) is greater than VAREF (high-level voltage reference) then the

conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without

overflow indication).

If the input voltage (VAIN) is lower than VSSA (low-level voltage reference) then the

conversion result in the ADCDRH and ADCDRL registers is 00 00h.

The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH

and ADCDRL registers. The accuracy of the conversion is described in Section 19:

Electrical characteristics.

RAIN is the maximum recommended impedance for an analog input signal. If the impedance

is too high, this will result in a loss of accuracy due to leakage and sampling not being

completed in the allotted time.

17.3.1

A/D converter configuration

The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the

Section 9: I/O ports. Using these pins as analog inputs does not affect the ability of the port

to be read as a logic input.

In the ADCCSR register:

●

Select the CS[3:0] bits to assign the analog channel to convert.

17.3.2

Starting the conversion

In the ADCCSR register:

●

Set the ADON bit to enable the A/D converter and to start the conversion. From this

time on, the ADC performs a continuous conversion of the selected channel.

When a conversion is complete:

●

The EOC bit is set by hardware.

●

The result is in the ADCDR registers.

A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.

To read the 10 bits, perform the following steps:

Poll the EOC bit.

Read the ADCDRL register.

Read the ADCDRH register. This clears EOC automatically.

Note:

The data is not latched, so both the low and the high data register must be read before the

next conversion is complete, so it is recommended to disable interrupts while reading the

conversion result.

To read only 8 bits, perform the following steps:

Poll the EOC bit.

Read the ADCDRH register. This clears EOC automatically.

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