ST72325AR7-Auto datasheet(212/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

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Doc ID 13770 Rev 3

Figure 89.

RESET pin

protection when LVD is disabled

Note:

- The reset network protects the device against parasitic resets.

- The output of the external reset circuit must have an open-drain output to drive the ST7

reset pad. Otherwise the device can be damaged when the ST7 generates an internal reset

(LVD or watchdog).

- Whether the reset source is internal or external, the user must ensure that the level on the

RESET pin can go below the VIL maximum level specified in Section 19.9.1 on page 210.

Otherwise the reset will not be taken into account internally.

- Because the reset circuit is designed to allow the internal RESET to be output in the

RESET pin, the user must ensure that the current sunk on the RESET pin is less than the

absolute maximum value specified for IINJ(RESET) in Section 19.2.2 on page 191.

19.9.2

ICCSEL/VPP pin

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

Figure 90.

Two typical applications with ICCSEL/VPP pin

(1)

When ICC mode is not required by the application, the ICCSEL/VPP pin must be tied to VSS.

0.01µF

EXTERNAL

RESET

CIRCUIT

USER

Required

ST72XXX

PULSE

GENERATOR

Filter

RON

VDD

WATCHDOG

INTERNAL

RESET

Table 131.

ICCSEL/VPP pin characteristics

Symbol

Parameter

Conditions

Min

Max(1)

Data based on design simulation and/or technology characteristics, not tested in production

Unit

Ilkg

Input leakage current

VIN =VSS

±1

µA

ICCSEL/VPP

ST72XXX

10k



PROGRAMMING

TOOL

VPP

ST72XXX

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