STM8S datasheet(302/467 Pages) STMICROELECTRONICS

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Inter-integrated circuit (I2C) interface

RM0016

302/467

DocID14587 Rev 14

Overrun/underrun error (OVR)

An Overrun error can occur in slave mode when clock stretching is disabled and the I2C

interface is receiving data. The interface has received a byte (RXNE = 1) and the data in DR

has not been read, before the next byte is received by the interface. In this case,

•

The last received byte is lost

•

In case of overrun error, software should clear the RXNE bit and the transmitter should

re-transmit the last received byte.

Underrun error can occur in slave mode when clock stretching is disabled and the I2C

interface is transmitting data. The interface has not updated the DR with the next byte

(TXE=1), before the clock comes for the next byte. In this case,

•

The same byte in the DR register will be sent again

•

The user should make sure that data received on the receiver side during an underrun

error is discarded and that the next bytes are written within the clock low time specified

in the I2C bus standard.

•

For the first byte to be transmitted, the DR must be written after ADDR is cleared and

before the first SCL rising edge. If it is not possible, the receiver must discard the first

data.

21.4.4

SDA/SCL line control

•

If clock stretching is enabled:

–

Transmitter mode: If TXE = 1 and BTF = 1: the interface holds the clock line low

before transmission to wait for the microcontroller to read SR1 and then write the

byte in the Data register (both buffer and shift register are empty).

–

Receiver mode: If RXNE = 1 and BTF = 1: the interface holds the clock line low

after reception to wait for the microcontroller to read SR1 and then read the byte in

the Data Register or write to CR2 (both buffer and shift register are full).

•

If clock stretching is disabled in Slave mode:

–

Overrun error in case of RXNE = 1 and no read of DR has been done before the

next byte is received. The last received byte is lost.

–

Underrun error in case TXE = 1 and no write into DR has been done before the

next byte must be transmitted. The same byte will be sent again.

–

Write Collision not managed.

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