HCS08 datasheet(308/316 Pages) NXP

308 / 316 page

Appendix A Electrical Characteristics

MC9S08SG8 MCU Series Data Sheet, Rev. 8

308

Freescale Semiconductor

A.12.3

SPI

Table A-15 and Figure A-14 through Figure A-17 describe the timing requirements for the SPI system.

Table A-15. SPI Electrical Characteristic

Num1

Refer to Figure A-14 through Figure A-17.

Rating2

All timing is shown with respect to 20% VDD and 70% VDD, unless noted; 100 pF load on all SPI pins. All timing assumes slew

rate control disabled and high drive strength enabled for SPI output pins.

Symbol

Min

Max

Unit

Temp Rated3

3 Electrical characteristics only apply to the temperature rated devices marked with x.

Standard

AEC Grade

Cycle time

Master

Slave

tSCK

2048

—

tcyc

Enable lead time

Master

Slave

tLead

—

1/2

—

tSCK

Enable lag time

Master

Slave

tLag

—

1/2

—

tSCK

Clock (SPSCK) high time

Master and Slave

tSCKH

1/2 tSCK – 25

—

Clock (SPSCK) low time

Master and Slave

tSCKL

1/2 tSCK – 25

—

Data setup time (inputs)

Master

Slave

tSI(M)

tSI(S)

—

Data hold time (inputs)

Master

Slave

tHI(M)

tHI(S)

—

Access time, slave4

Time to data active from high-impedance state.

040

Disable time, slave5

Hold time to high-impedance state.

tdis

—40

Data setup time (outputs)

Master

Slave

tSO

—

Data hold time (outputs)

Master

Slave

tHO

–10

—

Operating frequency

Master

Slave

fop

fBus/2048

fBus/4

6 Maximum baud rate must be limited to 5 MHz due to input filter characteristics.

MHz

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