P5021 datasheet(55/155 Pages) NXP

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Electrical characteristics

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Freescale Semiconductor

2.1.2

Recommended operating conditions

This table provides the recommended operating conditions for this device. Note that proper device operation outside these

conditions is not guaranteed.

Table 3. Recommended operating conditions

Parameter

Symbol

Recommended

value

Unit

Notes

Core group A (core 0,1) supply voltage

VDD_CA

1.1 ± 50mV (core

frequency

≤

2000 MHz)

1.2V ± 30mV (core

frequency

2000 MHz)

V1,6

Platform supply voltage

VDD_PL

1.0 ± 50mV

1,6

PLL supply voltage (core, platform, DDR, FMan)

AVDD

1.0 ± 50mV

—

PLL supply voltage (SerDes)

AVDD_SRDS

1.0 ± 50mV

—

Fuse programming override supply

POVDD

1.5 ± 75mV

DUART, I2C, DMA, MPIC, GPIO, system control and power

management, clocking, debug, I/O voltage select, and JTAG I/O

voltage

OVDD

3.3 ± 165mV

—

eSPI, eSDHC

CVDD

3.3 ± 165mV

2.5 ± 125mV

1.8 ± 90mV

V—

DDR DRAM I/O voltage

DDR3

GVDD

1.5 ± 75mV

—

DDR3L

1.35 ± 67mV

Enhanced local bus I/O voltage

BVDD

3.3 ± 165mV

2.5 ± 125mV

1.8 ± 90mV

V—

Main power supply for internal circuitry of SerDes and pad power

supply for SerDes receiver

SVDD

1.0 + 50mV

1.0 – 30mV

V—

Pad power supply for SerDes transmitter

XVDD

1.8 ± 90mV

1.5 ± 75mV

V—

Ethernet I/O, Ethernet Management interface 1 (EMI1), 1588, GPIO

LVDD

3.3 ± 165mV

2.5 ± 125mV

USB PHY transceiver supply voltage

USB_VDD_3P3

3.3 ± 165mV

—

USB PHY PLL supply voltage

USB_VDD_1P0

1.0 ± 50mV

—

Low-power security monitor supply

VDD_LP

1.0 ± 50mV

—

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