P5021 datasheet(74/155 Pages) NXP

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P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Electrical characteristics

Freescale Semiconductor

This figure provides the AC test load for the DDR3 and DDR3L controller bus.

Figure 12. DDR3 and DDR3L controller bus AC test load

2.10

eSPI

This section describes the DC and AC electrical specifications for the eSPI interface.

2.10.1

eSPI DC electrical characteristics

This table provides the DC electrical characteristics for the eSPI interface operating at CVDD = 3.3 V.

This table provides the DC electrical characteristics for the eSPI interface operating at CVDD = 2.5 V.

Table 26. eSPI DC electrical characteristics (CVDD = 3.3 V)

1,2

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage

VIH

2.0

—

Input low voltage

VIL

—0.8

Input current (VIN = 0 V or VIN = CVDD)IIN

—±40

μA2

Output high voltage

(CVDD = min, IOH = –2 mA)

VOH

2.4

—

Output low voltage

(CVDD = min, IOL = 2 mA)

VOL

—0.4

—

Notes:

1. The min VILand max VIH values are based on the respective min and max CVIN values found in Table 3.

2. The symbol VIN, in this case, represents the CVIN symbol referenced in Section 2.1.2, “Recommended operating conditions.”

Table 27. eSPI DC electrical characteristics (CVDD = 2.5 V)

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Max

Unit

Notes

Input high voltage

VIH

1.7

—

Input low voltage

VIL

—0.7

Input current (VIN = 0 V or VIN = CVDD)IIN

—±40

μA2

Output high voltage

(CVDD = min, IOH = –1 mA)

VOH

2.0

—

Output low voltage

(CVDD = min, IOL = 1 mA)

VOL

—0.4

—

Notes:

1. The min VILand max VIH values are based on the respective min and max CVIN values found in Table 3.

2. The symbol VIN, in this case, represents the CVIN symbol referenced in Section 2.1.2, “Recommended operating conditions.”

Output

Z0 = 50 Ω

RL = 50 Ω

GVDD/2

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