| 전자부품 데이터시트 검색엔진 |
|
LXT971ABC 데이터시트(PDF) 64 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
LXT971ABC 데이터시트(HTML) 64 Page - Intel Corporation |
|
64 / 90 page ![]() LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver 64 Datasheet Document #: 249414 Revision #: 002 Rev. Date: August 7, 2002 Figure 31. 100BASE-FX Transmit Timing Table 32. 100BASE-FX Transmit Timing Parameters Parameter Symbol Min Typ1 Max Units2 Test Conditions TXD<3:0>, TX_EN, TX_ER setup to TX_CLK High t1 12 – – ns – TXD<3:0>, TX_EN, TX_ER hold from TX_CLK High t2 0 – – ns – TX_EN sampled to CRS asserted t3 17 – 20 BT – TX_EN sampled to CRS de-asserted t4 22 – 24 BT – TX_EN sampled to TPFO out (Tx latency) t5 5 – 5.3 BT – 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. 2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate. 100BASE-T bit time = 10-8 s or 10 ns. t1 t2 t5 t3 t4 0ns 250ns TXCLK TX_EN TXD<3:0> TPFO CRS |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |