LXT971ABC datasheet(34/90 Pages) INTEL

부품명	LXT971ABC

상세설명	3.3V Dual-Speed Fast Ethernet PHY Transceiver

PDF	90 Pages

Scroll/Zoom	100%

제조업체	INTEL [Intel Corporation]

홈페이지	http://www.intel.com

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34 / 90 page

LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

3.6.7

Loopback

The LXT971A provides two loopback functions, operational and test (see Table 10). Loopback

paths are shown in Figure 13.

Figure 10. 10BASE-T Clocking

Figure 11. 100BASE-X Clocking

Figure 12. Link Down Clock Transition

RX_CLK

(Sourced by LXT971A)

2.5 MHz during auto-negotiation and 10BASE-T Data & Idle

TX_CLK

(Sourced by LXT971A)

2.5 MHz during auto-negotiation and 10BASE-T Data & Idle

Constant 25 MHz

RX_CLK

(Sourced by LXT971A)

2.5 MHz during auto-negotiation

TX_CLK

(Sourced by LXT971A)

Constant 25 MHz

25 MHz once 100BASE-X

Link Established

2.5 MHz during auto-negotiation

25 MHz once 100BASE-X

Link Established

Any Clock

2.5 MHz Clock

Clock transition time will not exceed

2X the nominal clock period:

10 Mbps = 2.5 MHz

100 Mbps = 25 MHz

Link-Down Condition/Auto-Negotiate Enabled

RX_CLK

TX_CLK

LXT971ABC 데이터시트(PDF) 34 Page - Intel Corporation