LXT971ABC datasheet(61/90 Pages) INTEL

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

5.2

Timing Diagrams

Figure 28. 100BASE-TX Receive Timing - 4B Mode

Table 29. 100BASE-TX Receive Timing Parameters - 4B Mode

Parameter

Sym

Min

Typ1

Max

Units2

Test Conditions

RXD<3:0>, RX_DV, RX_ER setup

to RX_CLK High

–

RXD<3:0>, RX_DV, RX_ER hold

from RX_CLK High

–

CRS asserted to RXD<3:0>, RX_DV

–

Receive start of “J” to CRS asserted

–

Receive start of “T” to CRS de-asserted

–

Receive start of “J” to COL asserted

–

Receive start of “T” to COL de-asserted

–

1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production

testing.

2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate.

100BASE-T bit time = 10-8 s or 10 ns.

0ns

250ns

CRS

RX_DV

RXD<3:0>

RX_CLK

COL

TPFI

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