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LXT971ABC 데이터시트(PDF) 68 Page - Intel Corporation |
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LXT971ABC 데이터시트(HTML) 68 Page - Intel Corporation |
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68 / 90 page ![]() LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver 68 Datasheet Document #: 249414 Revision #: 002 Rev. Date: August 7, 2002 Figure 36. Auto-Negotiation and Fast Link Pulse Timing Figure 37. Fast Link Pulse Timing Table 37. Auto-Negotiation and Fast Link Pulse Timing Parameters Parameter Symbol Min Typ1 Max Units Test Conditions Clock/Data pulse width t1 – 100 – ns – Clock pulse to Data pulse t2 55.5 – 63.8 µs– Clock pulse to Clock pulse t3 123 – 127 µs– FLP burst width t4 – 2 – ms – FLP burst to FLP burst t5 8 12 24 ms – Clock/Data pulses per burst – 17 – 33 ea – 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. TPFOP t1 t1 t2 t3 Clock Pulse Data Pulse Clock Pulse TPFOP t4 t5 FLP Burst FLP Burst |
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