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ADC3683 데이터시트(PDF) 59 Page - Texas Instruments

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부품명 ADC3683
상세설명  ADC3683-SP Space Grade 18-Bit 1 to 65MSPS, Low Noise, Ultra-low Power Dual Channel ADC
PDF  70 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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ADC3683 데이터시트(HTML) 59 Page - Texas Instruments

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Figure 9-11. Register 0x1A
7
6
5
4
3
2
1
0
0
LVDS ½
SWING
0
0
0
0
0
0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Table 9-13. Register 0x1A Field Descriptions
Bit
Field
Type
Reset
Description
7
0
R/W
0
Must write 0
6
LVDS ½ SWING
R/W
0
This bit reduces the LVDS output current from 3.5mA to 1.75mA
which reduces power consumption.
5-0
0
R/W
0
Must write 0
Figure 9-12. Register 0x1B
7
6
5
4
3
2
1
0
MAPPER EN
20B EN
BIT MAPPER RES
0
0
0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Table 9-14. Register 0x1B Field Descriptions
Bit
Field
Type
Reset
Description
7
MAPPER EN
R/W
0
This bit enables changing the resolution of the output (including
output serialization factor) in bypass mode only. This bit is not
needed for 20-bit resolution output.
0: Output bit mapper disabled.
1: Output bit mapper enabled.
6
20B EN
R/W
0
This bit enables 20-bit output resolution which can be useful for
very high decimation settings so that quantization noise doesn't
impact the ADC performance.
0: 20-bit output resolution disabled.
1: 20-bit output resolution enabled.
5-3
BIT MAPPER RES
R/W
000
Sets the output resolution using the bit mapper. MAPPER EN bit
(D6) needs to be enabled when operating in bypass mode..
000: 18 bit
001: 16 bit
010: 14 bit
all others, n/a
2-0
0
R/W
0
Must write 0
Table 9-15. Register Settings for Output Bit Mapper vs Operating Mode
BYPASS/DECIMATION
OUTPUT RESOLUTION
MAPPER EN (D7)
BIT MAPPER RES (D5-D3)
Decimation Bypass
Resolution Change
1
000: 18-bit
001: 16-bit
010: 14-bit
Real Decimation
Resolution Change (default 18-bit)
0
Complex Decimation
0
www.ti.com
ADC3683-SP
SBASAB5 – MARCH 2024
Copyright © 2024 Texas Instruments Incorporated
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