MPC8555CPXAPF datasheet(12/88 Pages) FREESCALE

12 / 88 page

MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

Power Characteristics

2.1.4

Output Driver Characteristics

Table 3 provides information on the characteristics of the output driver strengths. The values are

preliminary estimates.

Power Characteristics

The estimated typical power dissipation for this family of PowerQUICC III devices is shown in Table 4.

Table 3. Output Drive Capability

Driver Type

Programmable

Output Impedance

(

Ω)

Supply

Voltage

Notes

Local bus interface utilities signals

OVDD = 3.3 V

42 (default)

PCI signals

42 (default)

DDR signal

GVDD = 2.5 V

TSEC/10/100 signals

LVDD = 2.5/3.3 V

DUART, system control, I2C, JTAG

OVDD = 3.3 V

Notes:

1. The drive strength of the local bus interface is determined by the configuration of the appropriate bits in PORIMPSCR.

2. The drive strength of the PCI interface is determined by the setting of the PCI_GNT1 signal at reset.

Table 4. Power Dissipation(1) (2)

Notes:

1. The values do not include I/O supply power (OVDD, LVDD, GVDD) or AVDD.

CCB Frequency

(MHz)

Core Frequency

(MHz)

VDD

Typical Power(3)(4)

(W)

Maximum Power(5)

(W)

200

400

1.2

4.9

6.6

500

1.2

5.2

7.0

600

1.2

5.5

7.3

267

533

1.2

5.4

7.2

667

1.2

5.9

7.7

800

1.2

6.3

9.1

333

667

1.2

6.0

7.9

833

1.2

6.5

9.3

1000(6)

1.3

9.6

12.8

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