TMP93CS32F datasheet(87/180 Pages) TOSHIBA

87 / 180 page

TMP93CS32

2004-02-10

93CS32-85

Table 3.7.2 PWM Cycle

at fc

= 20 MHz

PWM Cycle

− 1

Select

Prescaler Clock

<PRCK1:0>

Gear Value

<GEAR2:0>

φT1

φT4

φT16

φT1

φT4

φT16

φT1

φT4

φT16

000 (fc)

25.2

µs 100.8 µs 403.2 µs

50.8

µs 203.2 µs 812.8 µs 102.0 µs 408.0 µs

1.63 ms

001 (fc/2)

50.4

µs 201.6 µs 806.4 µs 101.6 µs 406.4 µs

1.63 ms

204.0

µs 816.0 µs

3.26 ms

010 (fc/4)

100.8

µs 403.2 µs

1.61 ms

203.2

µs 812.8 µs

3.26 ms

408.0

µs

1.63 ms

6.53 ms

011 (fc/8)

201.6

µs 806.4 µs

3.23 ms

406.4

µs

1.63 ms

6.52 ms

816.0

µs

3.26 ms 13.06 ms

(fFPH)

100 (fc/16)

403.2

µs

1.61 ms

6.45 ms

812.8

µs

3.25 ms 13.04 ms

1.63 ms

6.53 ms 26.11 ms

(fc/16 clock)

XXX

403.2

µs

1.61 ms

6.45 ms

812.8

µs

3.25 ms 13.04 ms

1.63 ms

6.53 ms 26.11 ms

XXX: Don’t care

(5) Timer mode setting registers

Table 3.7.3 shows the list of 8-bit timer modes.

Table 3.7.3 Timer Mode Setting Registers

T10MOD/T32MOD

TFFCR

Name of Function in

T10M/T32M

PWM2

T1CLK/T3CLK

T0CLK/T2CLK

TFF1IS/TFF3IS

Function

Timer Mode

PWM Cycle

Upper Timer Input

Clock

Lower Timer Input

Clock

Timer F/F Invert

Signal Select

16-bit timer mode

−

φT1, φT4, φT16

(01, 10, 11)

−

8-bit timer

× 2 channels

−

Lower timer

match:

φT1, 16, 256

(00, 01, 10, 11)

φT1, φT4, φT16

(01, 10, 11)

0: Lower timer

output

1: Upper timer

output

8-bit PPG

× 1channel

−

φT1, φT4, φT16

(01, 10, 11)

−

8-bit PWM

× 1channel

− 1, 27 − 1, 28 − 1

(01, 10, 11)

−

φT1, φT4, φT16

(01, 10, 11)

−

8-bit timer

× 1channel

−

φT1, φT16, φT256

(01, 10, 11)

−

Output disabled

−: Don’t care

*: Don’t set in T10MOD

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