TMC2192 datasheet(50/69 Pages) CADEKA

50 / 69 page

TMC2192

PRODUCT SPECIFICATION

REV. 1.0.0 8/13/03

Control Register Deﬁnitions (continued)

Timing Register (0x25)

76543210

Reg

Bit

Name

Description

7-0

Active Video Region Duration.

This 8 bit register holds the LSB’s of a 10 bit value extending from 0 to 1023

PCK cycles.

Timing Register (0x26)

76543210

Reg

Bit

Name

Description

7-0

Active Video Region 2nd Half Line Duration.

This 8 bit register holds the LSB’s of a 10 bit value extending from 0 to 1023

PCK cycles.

Timing Register (0x27)

76543210

Reg

Bit

Name

Description

7-0

Active Video Region 1st Half Line Duration.

This 8 bit register holds the LSB’s of a 10 bit value extending from 0 to 1023

PCK cycles.

Timing Register (0x28)

76543210

Reg

Bit

Name

Description

7-0

Equalization Pulse Low Duration.

This 8 bit register holds a value extending from 0 to 255 PCK cycles.

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