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IMX35 데이터시트(PDF) 111 Page - Freescale Semiconductor, Inc |
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IMX35 데이터시트(HTML) 111 Page - Freescale Semiconductor, Inc |
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111 / 148 page ![]() i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 111 Figure 89. Test Access Port Timing Diagram Figure 90. TRST Timing Diagram Table 72. SJC Timing Parameters ID Parameter All Frequencies Unit Min. Max. SJ1 TCK cycle time 1001 —ns SJ2 TCK clock pulse width measured at VM 2 40 — ns SJ3 TCK rise and fall times — 3 ns SJ4 Boundary scan input data set-up time 10 — ns SJ5 Boundary scan input data hold time 50 — ns SJ6 TCK low to output data valid — 50 ns SJ7 TCK low to output high impedance — 50 ns SJ8 TMS, TDI data set-up time 10 — ns SJ9 TMS, TDI data hold time 50 — ns SJ10 TCK low to TDO data valid — 44 ns TCK (Input) TDI (Input) TDO (Output) TDO (Output) TDO (Output) VIH VIL Input Data Valid Output Data Valid Output Data Valid TMS SJ8 SJ9 SJ10 SJ11 SJ10 TCK (Input) TRST (Input) SJ13 SJ12 |
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