CDCUN1208LP

/1,/2,/4,/8

OE

OTTP

ERC

LVCMOS

HCSL

LVDS

NC

V

DD

CDCUN1208LP

OE

ERC

OTTP

LVCMOS

HCSL

LVDS

V

DD

DIVIDE

IN2P

IN1P

INSEL

IN1N

IN2N

MODE

NC

/1,/2,/4,/8

DIVIDE

IN2P

IN1P

IN1N

IN2N

MODE

NC

ITTP

LVCMOS

HCSL

LVDS

NC

V

DD

INSEL

ITTP

LVCMOS

NC

V

DD

CDCUN1208LP

www.ti.com

SCAS928 – MAY 2012

400 MHz Low Power 2:8 Fan-Out Buffer with

Universal Inputs and Outputs

Check for Samples: CDCUN1208LP

1

FEATURES

•

Maximum Operating Frequency:

–

Differential Mode: up to 400 MHz

•

–

LVCMOS Mode: up to 250 MHz

–

Input Type (HCSL, LVDS, LVCMOS)

•

ESD Protection Exceeds 2kV HBM, 500V CDM

–

Output Type (HCSL, LVDS, LVCMOS)

•

Industrial Temperature Range (–40°C to 85°C)

–

Signal Edge Rate (Slow, Medium, Fast)

•

Wide Supply Range (1.8V, 2.5V, or 3.3V)

–

Clock Input Divide Value (/1, /2, /4, /8) – IN2

only

APPLICATIONS

•

Low Power Consumption and Power

Management Features Including 1.8V

•

Communications Systems (Ethernet, PCI

Operation and Output Enable Control

Express)

•

Integrated Voltage Regulators Improve PSNR

•

Computing Systems (Ethernet, PCIe, USB)

•

Excellent Additive Jitter Performance

•

Consumer (Set top boxes, video equipment)

–

200 fs RMS (10kHz-20MHz), LVDS at

•

Office Automation

100MHz

DESCRIPTION

The CDCUN1208LP is a 2:8 fan-out buffer featuring a wide operating supply range, two universal

differential/single-ended inputs, and universal outputs (HCSL, LVDS, or LVCMOS) with edge rate control. One of

the device inputs includes a divider that provides divide values of /1, /2, /4, or /8. The CDCUN1208LP is offered

in a 32 pin QFN package reducing the solution footprint. The device is flexible and easy to use. The state of

with which a host processor controls device settings. The CDCUN1208LP delivers excellent additive jitter

performance, and low power consumption. The output section includes four dedicated supply pins enabling the

operation of output ports from different power supply domains. This provides the ability to clock devices switching

at different LVCMOS levels without the need for external logic level translation circuitry.

Figure 1. CDCUN1208LP Applications – HCSL and LVDS Fan-Out Buffer Mode

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2012, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.