AN2014 datasheet(21/65 Pages) STMICROELECTRONICS

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AN2014

Recommendations to improve EEPROM reliability

3.3.1

Power-up and power-on-reset sequence

During power-up, in order for the internal EEPROM reset to be performed correctly, the

application designer has to make sure that the VCC supply voltage waveform rises

monotonously, with a maximum slew rate of 1 V/µs, from VSS to the final stabilized VCC

supply value.

In ST EEPROM devices, the POR (power-on-reset) circuit is activated first as it locks the

part before the internal logic is able to run: at power-up, the device does not respond to any

instruction until VCC has reached, starting from 0 V, the power-on-reset threshold voltage,

VPOR. When VCC passes the VPOR threshold, the device is reset, in Standby Power mode,

but the application designer should make sure that no instruction is sent to the EEPROM

until the power supply has reached a stabilized DC value of VCCmax > VCC > VCCmin (see

Figure 14).

Before a controlled power-down sequence (continuous decrease in VCC), the device must

be placed in the Standby Power mode.

If, for some uncontrolled reason, the power supply drops, it is recommended to carry out a

safe power-down sequence by pulling VCC to 0 V (or at least below VPOR), and then to

perform a safe power-up sequence, as described previously. This will secure the device re-

initialization.

Figure 14. Power-up

1. Power-up is safe with a monotonous rising slope slower than 1V/µs.

Table 3. Typical POR threshold values

Bus protocol

I²C

SPI

MICROWIRE

Device voltage range

All

5 V

Other device

ranges

5 V

Other Device

Ranges

POR threshold limits

over the whole

temperature range

1 V ± 0.5 V

3 V ± 0.5 V

1 V ± 0.5 V

3 V ± 0.5 V

1 V ± 0.5 V

VPOR

VCCmin

VCCmax

Monotonous rising slope

slower than 1 V/µs

Part locked

by POR

Standby

mode

Operation allowed

time

ai10859b

Voltage

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