AN2014 datasheet(31/65 Pages) STMICROELECTRONICS

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AN2014

Hardware considerations

4.2.5

Serial Data output (Q)

The Serial Data Output (Q) is a push-pull tri-state output buffer. The Serial Data Output

being often in the high impedance state (e.g. during a Write) and connected to a master

input pin, it may be useful to connect it to a pull-up (or pull-down) resistor to set a default

value on the bus and thus prevent the master input from toggling (see Figure 23: Chip

Select, Clock, Data, Hold input pins). Application designers must be aware that connecting

several devices on the Serial Data Output (Q) increases capacitive load of the line. The

access time of the device is tested with a 100 pF or 30 pF capacitive load, depending on the

clock frequency (refer to the M95xxx device datasheet for the values of the capacitive load

and clock frequency).

Figure 25. Output pin tri-state buffer

Note:

The push-pull upper transistor (NMOS transistor connected to VCC) offers a parasitic

reverse diode to VCC, therefore the voltage applied on Q must never be higher than VCC.

4.2.6

Recommended SPI EEPROM connections

Recommended SPI EEPROM connections are shown in Figure 26 and Figure 27. Note that

for both circuits:

The decoupling capacitor (10 nF min) must be placed as close as possible to the

package pins VCC and VSS.

S input is pulled high with RPU and C input is pulled low with RPD. In doing so, if the SPI

master bus leaves S and C in high impedance, the SPI EEPROM is deselected and it is

ensured that clock C remains low or falls low (unlike a case where S and C could rise

together, that is tCHSH=0, out of a specification event).

If unused, the Hold and W pins must be directly connected to VCC, as a CMOS input

must never be left floating.

AN2014 데이터시트(PDF) 31 Page - STMicroelectronics