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LAN9730 데이터시트(PDF) 91 Page - Microchip Technology |
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LAN9730 데이터시트(HTML) 91 Page - Microchip Technology |
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91 / 222 page ![]() 2012-2015 Microchip Technology Inc. DS00001946A-page 91 LAN9730/LAN9730i 4.7.4.1 Supported EEPROM Operations The EEPROM controller supports the following EEPROM operations under host control via the E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A description and functional timing diagram is pro- vided below for each operation. Refer to the E2P_CMD register description in Section 6.3.12, "EEPROM Command Register (E2P_CMD)" for E2P_CMD field settings for each command. ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will erase the location selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the EEPROM does not respond within 30 ms. ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a bulk erase of the entire EEPROM. The EPC_TO bit is set if the EEPROM does not respond within 30 ms. FIGURE 4-21: EEPROM ERASE CYCLE FIGURE 4-22: EEPROM ERAL CYCLE ERASE CYCLE 1 EECLK EEDIO (INPUT) EEDIO (OUTPUT) EECS 11 A6 A0 tCSL ERAL CYCLE 0 EECLK EEDIO (INPUT) EEDIO (OUTPUT) EECS 10 10 tCSL |
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