LAN9730 datasheet(94/222 Pages) MICROCHIP

94 / 222 page

LAN9730/LAN9730i

DS00001946A-page 94

 2012-2015 Microchip Technology Inc.

WRAL (Write All): If erase/write operations are enabled in the EEPROM, this command will cause the contents of the

E2P_DATA register to be written to every EEPROM memory location. The EPC_TO bit is set if the EEPROM does not

respond within 30 ms.

Table 4-60, "Required EECLK Cycles", shown below, shows the number of EECLK cycles required for each EEPROM

operation.

4.7.4.2

Host Initiated EEPROM Reload

The host can initiate a reload of the EEPROM by issuing the RELOAD command via the E2P Command (E2P_CMD)

grammed, and the reload will fail. The Data Loaded bit of the E2P_CMD register indicates a successful reload of the

EEPROM.

4.7.4.3

EEPROM Command and Data Registers

Refer to Section 6.3.12, "EEPROM Command Register (E2P_CMD)" and Section 6.3.13, "EEPROM Data Register

(E2P_DATA)" for a detailed description of these registers. Supported EEPROM operations are described in these sec-

tions.

4.7.4.4

EEPROM Timing

Refer to Section 7.5.5, "EEPROM Timing" for detailed EEPROM timing specifications.

FIGURE 4-27:

EEPROM WRAL CYCLE

TABLE 4-60:

REQUIRED EECLK CYCLES

Operation

Required EECLK Cycles

ERASE

ERAL

EWDS

EWEN

READ

WRITE

WRAL

Note:

It is not recommended to use the RELOAD command as part of normal operation, as race conditions can

occur with USB Commands that access descriptor data. It is best for the host to issue an SRST to reload

the EEPROM data.

WRAL CYCLE

EECLK

EEDIO (INPUT)

EEDIO (OUTPUT)

EECS

tCSL

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