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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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Z80 데이터시트(PDF) 102 Page - Zilog, Inc. |
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Z80 데이터시트(HTML) 102 Page - Zilog, Inc. |
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102 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Direct Memory Access Figure 33. Interrupt Service Routine Interrupt Latches Two primary latches are associated with the interrupt structure: • Interrupt Pending (IP). Set whenever the DMA requests an interrupt but has not yet acknowledged. It holds the INT line Low (Figure 34). • Interrupt Under Service (IUS). Set when the CPU acknowledges the DMA interrupt (Figure 35). This accomplishes three things: – Prevents further interrupts by this DMA MEMORY CPU DMA Jump Table IRegister Interrupt Vector Jump Table Service Routine Program Counter Program Counter Service Routine Write Registers Register A. B. C. |
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