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Integrated Functions (Continued)

The BLT buffers in the dedicated cache temporarily store

source anddestinationdata, typicallyonascanlinebasis.

The hardware automatically loads frame-buffer data

(source or destination) into the BLT buffers for each scan

line. The software is responsible for making sure that this

does not overflow the memory allocated for the BLT buff-

ers. When the source data is a bitmap, the data is loaded

directly into the BLT buffer before starting the BLT.

Vectors

are

initiated

writing

the

GP_VECTOR_MODE register (GX_BASE+8204h), which

specifies the direction of the vector and a “read destina-

tion data” flag. If the flag is set, the hardware will read

destination data along the vector and store it temporarily

in BLT Buffer 0.

4.4.2

Master/Slave Registers

When starting a BitBLT or vector operation, the graphics

pipeline registers are latched from the master registers to

the slave registers. A second BitBLT or vector operation

can then be loaded into the master registers while the first

operation is rendered. If a second BLT is pending in the

master registers, any write operations to the graphics

pipeline registers will corrupt the values of the pending

BLT. Software must prevent this from happening by check-

ing the “BLT Pending” bit in the GP_BLT_STATUS register

(GX_BASE+820Ch[2].

Most of the graphics pipeline registers are latched directly

from the master registers to the slave registers when

starting a new BitBLT or vector operation. Some registers,

however, use the updated slave values if the master regis-

ters have not been written, which allows software to ren-

der successive primitives without loading some of the

registers as outlined in Table 4-21.

4.4.3

Pattern Generation

The graphics pipeline contains hardware support for 8x8

monochrome patterns (expanded to two colors), 8x8

dither patterns (expanded to four colors), and 8x1 color

patterns. The pattern hardware, however, does not main-

tain a pattern origin, so the pattern data must be justified

before it is loaded into the GXm processor’s registers. For

solid primitives, the pattern hardware is disabled and the

pattern

color

always

sourced

from

the

GP_PAT_COLOR_0 register (GX_BASE+8110h).

Table 4-21. Graphics Pipeline Registers

Master

Function

GP_DST_XCOOR

Next X position along vector.

Master register if written, otherwise:

Unchanged slave if BLT, source mode = bitmap.

Slave + width if BLT, source mode = text glyph

GP_DST_YCOOR

Next Y position along vector.

Master register if written, otherwise:

Slave +/- height if BLT, source mode = bitmap.

Unchanged slave if BLT, source mode = text glyph.

GP_INIT_ERROR

Master register if written, otherwise:

Initial error for the next pixel along the vector.

GP_SRC_YCOOR

Master register if written, otherwise:

Slave +/- height if BLT, source mode = bitmap.

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