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CS89712 데이터시트(PDF) 18 Page - Cirrus Logic |
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CS89712 데이터시트(HTML) 18 Page - Cirrus Logic |
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18 / 170 page ![]() CS89712 18 DS502PP2 serted by the interrupt controller. (A descrip- tion for each bit in this register can be found in Section 3.6.1. 3) If interrupts are enabled the processor will jump to the appropriate address. 4) Interrupt dispatch software reads the interrupt status register to establish the source(s) of the interrupt and calls the appropriate interrupt ser- vice routine(s). 5) Software in the interrupt service routine will clear the interrupt source by some action spe- cific to the device requesting the interrupt (i.e., reading the UART RX register). The interrupt service routine may then re-enable in- terrupts, and any other pending interrupts will be serviced in a similar way. Alternately, it may return to the interrupt dispatch code, which can check for any more pending interrupts and dispatch them ac- cordingly. The “End of Interrupt” type interrupts are latched. All other interrupt sources (i.e., exter- nal interrupt source) must be held active until its re- spective service routine starts executing. See Section 3.13, “End Of Interrupt Locations” for more details. Table 7, Table 8, and Table 9 show the names and allocation of interrupts in the CS89712. |
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