CS89712 datasheet(29/170 Pages) CIRRUS

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CS89712

DS502PP2

tial that software monitors the appropriate status

registers within the CL-PS6700s to ensure that

there are no pending posted bus transactions before

the Standby State is entered. Failure to do this will

result in incomplete PC Card accesses.

2.15 Endianness

The CS89712 uses a little endian configuration for

internal registers. However, it is possible to con-

nect the device to a big endian external memory

system. The big-endian / little-endian bit in the

ARM720T control register sets whether the

CS89712 treats words in memory as being stored in

big endian or little endian format. Memory is

viewed as a linear collection of bytes numbered up-

wards from zero. Bytes 0 to 3 hold the first stored

word, bytes 4 to 7 the second, and so on. In the little

endian scheme, the lowest numbered byte in a word

is considered to be the least significant byte of the

word and the highest numbered byte is the most

significant. Byte 0 of the memory system should be

connected to D[7:0] in this case. In the big endian

scheme the most significant byte of a word is stored

at the lowest numbered byte, and the least signifi-

cant byte is stored at the highest numbered byte.

Therefore, byte 0 of the memory system should be

connected to D[31:24]. Load and store are the only

instructions affected by the Endianness.

Table 19 and Table 20 demonstrate the behavior of

the CS89712 for read and write operations, includ-

ing the effect of performing non-aligned word ac-

cesses. The register definition section defines the

behavior of the internal CS89712 registers in the

big endian mode in more detail. For further infor-

mation, refer to ARM Application Note 61, “Big

and Little Endian Byte Addressing”.

Address (W/B) Data in Memory

(as seen by the

CS89712)

Byte Lanes to Memory / Ports / Registers

R0 Contents

Big Endian Memory

Little Endian Memory

7:0 15:8 23:16 31:24 7:0 15:8 23:16 31:24 Big Endian Little Endian

Word + 0 (W)

11223344

Word + 1 (W)

11223344

44112233

Word + 2 (W)

11223344

33441122

Word + 3 (W)

11223344

22334411

Word + 0 (H)

11223344

00001122

00003344

Word + 1 (H)

11223344

22000011

44000033

Word + 2 (H)

11223344

00003344

00001122

Word + 3 (H)

11223344

44000033

22000011

Word + 0 (B)

11223344

00000011

00000044

Word + 1 (B)

11223344

00000022

00000033

Word + 2 (B)

11223344

00000033

00000022

Word + 3 (B)

11223344

00000044

00000011

Note: dc = don’t care

Table 19. Effect of Endianness on Read Operations

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