CS89712 datasheet(22/170 Pages) CIRRUS

22 / 170 page

CS89712

DS502PP2

0xC000.0000 to 0xDFFF.FFFF is allocated to

SDRAM. The 1.5 GByte, less 8 kbytes for internal

registers, is not accessible in the CS89712. The

MMU should be programmed to generate an abort

exception for access to this area.

Internal peripherals are addressed through a set of

internal registers from address 0x8000.0000 to

0x8000.3FFF.

Table 12 shows how the 4-Gbyte address range of

the ARM720T processor (as configured within this

chip) is mapped. The memory map shown assumes

that two CL-PS6700 PC Card controllers are con-

nected. If this functionality is not required, then the

nCS[4] and nCS[5] memory is available. The exter-

nal boot ROM is not fully decoded (i.e., the boot

code will repeat within the 256 Mbyte space from

0x7000.0000 to 0x8000.0000).

When booted from on chip boot ROM, the SRAM

is fully decoded up to 128 kbytes. Access to any lo-

cation above this range will wrap within the range.

Address Range

Chip Select

0000.0000–0FFF.FFFF

CS[7]

(Internal only)

1000.0000–1FFF.FFFF

CS[6]

(Internal only)

2000.0000–2FFF.FFFF

nCS[5]

3000.0000–3FFF.FFFF

nCS[4]

4000.0000–4FFF.FFFF

nCS[3]

5000.0000–5FFF.FFFF

nCS[2]

6000.0000–6FFF.FFFF

nCS[1]

7000.0000–7FFF.FFFF

nCS[0]

Table 11. Chip Select Address Ranges After Boot From

On-Chip Boot ROM

Address

Contents

Size

0xF000.0000

Reserved

256 Mbytes

0xE000.0000

Reserved

256 Mbytes

0xD000.0000

Reserved

256 Mbytes

0xC000.0000

SDRAM

64 Mbytes

0x8000.4000

Unused

~1 Gbyte

0x8000.2000

Internal registers

8 kbytes

0x8000.0000

Internal registers

8 kbytes

0x7000.0000

Boot ROM (nCS[7])

128 bytes

0x6000.0000

SRAM (nCS[6])

48k bytes

0x5000.0000

PCMCIA-1 (nCS[5])

4 x 64 Mbytes

0x4000.0000

PCMCIA-0 (nCS[4])

4 x 64 Mbytes

0x3000.0000

Expansion (nCS[3])

256 Mbytes

0x2000.0000-0x2000.02FF

Expansion (nCS[2])

256 Mbytes

0x2000.0300-0x2000.030F

Ethernet Port (on nCS[2])

0x2000.0310-0x2FFF.FFFF

Expansion (nCS[2]) cont.

0x1000.0000

ROM Bank 1 (nCS[1])

256 Mbytes

0x0000.0000

ROM Bank 0 (nCS[0])

256 Mbytes

Table 12. CS89712 Memory Map in External Boot Mode

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