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PC87373 데이터시트(PDF) 122 Page - National Semiconductor (TI) |
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PC87373 데이터시트(HTML) 122 Page - National Semiconductor (TI) |
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122 / 174 page ![]() 9.0 Glue Functions (Continued) 122 www.national.com Revision 1.1 9.2.6 Power Distribution Control This function generates the BKFD_CUT and the LATCHED_BF_CUT power distribution control signals. An active low BKFD_CUT signal is generated when the Main power supply voltage is valid (PWRGD_PS = high) and the system is not in one of the S3 to S5 sleep states (SLP_S3 = high). The LATCHED_BF_CUT signal is generated from BKFD_CUT and SLP_S5 as follows: q Rising edge of BKFD_CUT while the system is not in S5 sleep state (SLP_S5 = high) sets LATCHED_BF_CUT to high. q Falling edge of BKFD_CUT while the system is not in S5 sleep state (SLP_S5 = high) resets LATCHED_BF_CUT to low. q When the system is in S5 sleep state (SLP_S5 = low), LATCHED_BF_CUT is reset to low. Figure 28 shows a simplified diagram of the circuit that generates the BKFD_CUT and the LATCHED_BF_CUT signals. Figure 28. BKFD_CUT and LATCHED_BF_CUT Generation (Simplified Diagram) For the AC characteristics, see Power Distribution Control on page 171. 9.2.7 Main Power Supply Control This function generates the PS_ON signal, which turns the Main power supply on and off. The Main power supply is turned on by an active low PS_ON signal, generated when the processor is currently inserted in its socket (CPU_PRESENT = low) and the system is not in one of the S3 to S5 sleep states (SLP_S3 = high). Figure 29 shows a simplified diagram of the circuit that generates the PS_ON signal. Figure 29. PS_ON Generation (Simplified Diagram) For the AC characteristics, see Main Power Supply Control on page 172. 1 K Ω BKFD_CUT VDD5 Pin Reset (BKFD_CUT) SLP_S5 LATCHED_BF_CUT Pin SLP_S3 PWRGD_PS R-S Flip-Flop Set Q Detector Detector 22 K Ω PS_ON VSB5 Pin SLP_S3 CPU_PRESENT |
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