LAN9250 datasheet(199/421 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001913A-page 199

LAN9250

11.15.4

HOST MAC MULTICAST HASH TABLE HIGH REGISTER (HMAC_HASHH)

The 64-bit Multicast table is used for group address filtering. For hash filtering, the contents of the destination address

in the incoming frame is used to index the contents of the Hash table. The most significant bit determines the register

to be used (Hi/Low), while the other five bits determine the bit within the register. A value of 00000 selects Bit 0 of the

Multicast Hash Table Lo register and a value of 11111 selects the Bit 31 of the Multicast Hash Table Hi register.

If the corresponding bit is 1, then the multicast frame is accepted. Otherwise, it is rejected. If the “Pass All Multicast” (MCPAS)

bit of the Host MAC Control Register (HMAC_CR) is set, then all multicast frames are accepted regardless of the multicast

hash values.

The Multicast Hash Table High register contains the higher 32 bits of the hash table and the Multicast Hash Table Low

information on address filtering.

11.15.5

HOST MAC MULTICAST HASH TABLE LOW REGISTER (HMAC_HASHL)

This read/write register defines the lower 32-bits of the Multicast Hash Table. Please refer to the Host MAC Multicast

Hash Table High Register (HMAC_HASHH) and Section 11.4, "Address Filtering," on page 142 for more information.

Offset:

04h

Size:

32 bits

Bits

Description

Type

Default

31:0

Upper 32-bits of the 64-bit Hash Table

R/W

00000000h

Offset:

05h

Size:

32 bits

Bits

Description

Type

Default

31:0

Lower 32-bits of the 64-bit Hash Table

R/W

00000000h

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