HCS08 datasheet(38/198 Pages) NXP

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Chapter 4 Memory Map and Register Definition

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

program and erase pulses. An integer number of these timing pulses is used by the command processor to

complete a program or erase command.

Table 4-5 shows program and erase times. The bus clock frequency and FCDIV determine the frequency

of FCLK (fFCLK). The time for one cycle of FCLK is tFCLK =1/fFCLK. The times are shown as a number

of cycles of FCLK and as an absolute time for the case where tFCLK =5 μs. Program and erase times

shown include overhead for the command state machine and enabling and disabling of program and erase

voltages.

4.5.3

Program and Erase Command Execution

The steps for executing any of the commands are listed below. The FCDIV register must be initialized and

any error flags cleared before beginning command execution. The command execution steps are:

1. Write a data value to an address in the flash array. The address and data information from this write

is latched into the flash interface. This write is a required first step in any command sequence. For

erase and blank check commands, the value of the data is not important. For page erase commands,

the address can be any address in the 512-byte page of flash to be erased. For mass erase and blank

check commands, the address can be any address in the flash memory. Whole pages of 512 bytes

are the smallest block of flash that can be erased.

NOTE

•

A mass or page erase of the last page in flash will erase the factory

programmed internal reference clock trim value.

•

Do not program any byte in the flash more than once after a successful

erase operation. Reprogramming bits in a byte which is already

programmed is not allowed without first erasing the page in which the

byte resides or mass erasing the entire flash memory. Programming

without first erasing may disturb data stored in the flash.

2. Write the command code for the desired command to FCMD. The five valid commands are blank

check (0x05), byte program (0x20), burst program (0x25), page erase (0x40), and mass erase

(0x41). The command code is latched into the command buffer.

3. Write a 1 to the FCBEF bit in FSTAT to clear FCBEF and launch the command (including its

address and data information).

A partial command sequence can be aborted manually by writing a 0 to FCBEF any time after the write to

the memory array and before writing the 1 that clears FCBEF and launches the complete command.

Table 4-5. Program and Erase Times

Parameter

Cycles of FCLK

Time if FCLK = 200 kHz

Byte program

μs

Byte program (burst)

μs1

1 Excluding start/end overhead

Page erase

4000

20 ms

Mass erase

20,000

100 ms

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