HCS08 datasheet(61/198 Pages) NXP

61 / 198 page

Chapter 5 Resets, Interrupts, and General System Control

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

5.8.4

System Options Register 1 (SOPT1)

This high-page register is a write-once register so only the first write after reset is honored. It can be read

at any time. Any subsequent attempt to write to SOPT1 (intentionally or unintentionally) is ignored to

avoid accidental changes to these sensitive settings. SOPT1 must be written during the user’s reset

initialization program to set the desired controls even if the desired settings are the same as the reset

settings.

321

COPE

COPT

STOPE

BKGDPE

RSTPE

Reset:

110

POR:

110

010

= Unimplemented or Reserved

U = unaffected

1 Bit 4 is reserved, writes will change the value but will have no effect on this MCU.

Figure 5-5. System Options Register 1 (SOPT1)

Table 5-6. SOPT1 Register Field Descriptions

Field

Description

COPE

COP Watchdog Enable — This write-once bit selects whether the COP watchdog is enabled.

0 COP watchdog timer disabled.

1 COP watchdog timer enabled (force reset on timeout).

COPT

COP Watchdog Timeout — This write-once bit selects the timeout period of the COP. COPT along with

COPCLKS in SOPT2 defines the COP timeout period.

0 Short timeout period selected.

1 Long timeout period selected.

STOPE

Stop Mode Enable — This write-once bit is used to enable stop mode. If stop mode is disabled and a user

program attempts to execute a STOP instruction, an illegal opcode reset is forced.

0 Stop mode disabled.

1 Stop mode enabled.

BKGDPE

Background Debug Mode Pin Enable — This write-once bit when set enables the

PTA4/TPM2CH0O/BKGD/MS pin to function as BKGD/MS. When clear, the pin functions as one of its output only

alternative functions. This pin defaults to the BKGD/MS function following any MCU reset.

0 PTA4/TPM2CH0O/BKGD/MS pin functions as PTA4 or TPM2CH0O.

1 PTA4/TPM2CH0O/BKGD/MS pin functions as BKGD/MS.

RSTPE

RESET Pin Enable — This write-once bit when set enables the PTA5/TPM2CH0I/IRQ/RESET pin to function as

RESET. When clear, the pin functions as one of its input only alternative functions. This pin defaults to its

input-only port function following an MCU POR. When RSTPE is set, an internal pullup device is enabled on

RESET.

0 PTA5/TPM2CH0I/IRQ/RESET pin functions as PTA5, IRQ or TPM2CH0I.

1 PTA5/TPM2CH0I/IRQ/RESET pin functions as RESET.

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